Principal Engineer, HSIO Digital Design

Company: Samsung Semiconductor
Location: San Jose
Posted on: February 16, 2026

Job Description:

Job Description Job Description Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every dayincluding smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities. Samsung Semiconductor Inc. (SSI) is advancing the world's technology. As a leader in Memory, System, LSI and LCD technologies, our US teams contribute to breakthroughs in 5G, SOC, memory and display. With our global perspective and diversity of thought, we proudly serve our customers around the world. We are looking for team members who share our commitment to learning and growth and excel when collaborating within and across teams. Location: Daily onsite presence at our San Jose, CA headquarters in alignment with our Flexible Work policy. Req: 42789 What You'll Do Samsung Semiconductor is looking for a Principal High Speed I/O Digital Design Engineer. This team is focused on next-generation HSIO (High-Speed I/O) design for Samsung's AI production platforms. Ideal candidates will have 10 years of industry experience specializing in digital design for die-to-die (chiplet) interfaces or similar high-speed I/O technologies. Candidates are expected to have a strong understanding of the end-to-end digital design flow and the ability to collaborate effectively with system and analog teams. What You Bring Bachelor's of Science degree with 20 years or a Master's degree with 18 years, or PhD with 15 years of experience in High-Speed I/O design Hands-on experience with Die-to-Die interface IP (e.g., UCIe, BOW), including: RTL design and verification Logic synthesis and Static timing analysis (STA) Semi-custom physical design Silicon validation and SoC integration Deep understanding of high-speed serial interconnect architectures (e.g., UCIe, PCIe, 100G/200G Ethernet) and associated design trade-offs Strong understanding of how analog and mixed-signal design and verification impact digital-on-top development flows Knowledge of Signal Integrity (SI) and Power Integrity (PI) modeling for High-Speed I/O designs Understanding of SoC protocols including AXI/CHI/CXS.B/CXL/PCIE/UA -Link Knowledge of Design for Testability (DFT) methodologies and flows Familiarity with Ethernet PMA / PMD / PCS layers Experience with firmware development for embedded microcontroller systems. You're inclusive, adapting your style to the situation and diverse global norms of our people. An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding. You're collaborative, building relationships, humbly offering support and openly welcoming approaches. Innovative and creative, you proactively explore new ideas and adapt quickly to change. LI-MD1 What We Offer The pay range below is for all roles at this level across all US locations and functions. Individual pay rates depend on a number of factors—including the role's function and location, as well as the individual's knowledge, skills, experience, education, and training. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision/401k, our inclusive rewards plan empowers our people to care for their whole selves. An investment in your future is an investment in ours. Give Back With a charitable giving match and frequent opportunities to get involved, we take an active role in supporting the community. Enjoy Time Away You'll start with 4 weeks of paid time off a year, plus holidays and sick leave, to rest and recharge. Care for Family Whatever family means to you, we want to support you along the way—including a stipend for fertility care or adoption, medical travel support, and virtual vet care for your fur babies. Prioritize Emotional Wellness With on-demand apps and free confidential therapy sessions, you'll have support no matter where you are. Stay Fit Eating well and being active are important parts of a healthy life. Our onsite Café and gym, plus virtual classes, make it easier. Embrace Flexibility Benefits are best when you have the space to use them. That's why we facilitate a flexible environment so you can find the right balance for you. Base Pay Range $219,000—$351,000 USD Equal Opportunity Employment Policy Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. When selecting team members, we prioritize talent and qualities such as humility, kindness, and dedication. We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities, long-term conditions, neurodivergent individuals, or those requiring pregnancy-related support. All candidates scheduled for an interview will receive guidance on requesting accommodations. Recruiting Agency Policy We do not accept unsolicited resumes. Only authorized recruitment agencies that have a current and valid agreement with Samsung Semiconductor, Inc. are permitted to submit resumes for any job openings. Applicant AI Use Policy At Samsung Semiconductor, we support innovation and technology. However, to ensure a fair and authentic assessment, we prohibit the use of generative AI tools to misrepresent a candidate's true skills and qualifications. Permitted uses are limited to basic preparation, grammar, and research, but all submitted content and interview responses must reflect the candidate's genuine abilities and experience. Violation of this policy may result in immediate disqualification from the hiring process. Applicant Privacy Policy https://semiconductor.samsung.com/about - us/careers/us/privacy/

Keywords: Samsung Semiconductor, Pleasanton , Principal Engineer, HSIO Digital Design, Engineering , San Jose, California