Senior Design Verification Manager/DV Lead
Posted on: March 15, 2023
Alif Semiconductor is revolutionizing the way secure connected
AI-enabled embedded solutions are created. We are looking for
motivated individuals who want to be involved in a fast-paced
environment with cutting-edge technology.Responsible for developing
pre-silicon functional verification solutions for our
cutting-edgemicrocontroller family of products.Responsibilities
- Lead a team of digital verification engineers in the planning
and verification of next generation micro controller products.
- Mentor verification team to derive test plan from
architecturalrequirements and design documents.
- Execute the verification strategies of SoC, and IP cores.
- Create test testbench architecture, develop reference models,
bus-functional models and drivers to verify the design
- Integrate Verification IPs from different vendors.
- Contribute to the definition of leading verification
methodologies and ensure the accepted best practices are followed
by the engineering team.
- Guide DV engineers to debug failures in simulation to root
- Objectively manage projects to achieve the defined verification
- Advanced knowledge of HVL methodology like UVM.
- Proven track record of full SOC cycle from concept to tape-out
- Experience in taping out large SOC systems with embedded ARM
- Hands-on verification experience of AXI Bus Fabric, APB, AHB,
and AXI, based bus architecture in UVM environment.
- Create IP level module and sub-system verification plan,
reusable Test Benches, test sequences, test infrastructure.
- Create UVM based coverage driven verification plans from design
specifications, review and refine to achieve coverage targets.
- In-depth knowledge and experience of working with low power
design, UPF integration, boot sequence, power cycle, HW/SW
- Knowledge of ARMlow power design and powerpolicy unit.
- Understand the details of High Efficient High performance SOC
Architecture, standard SOC component like Timer, DMA, memory
management schemes, low power spec, multi-processor systems, Memory
Controller Sub Systems, PLL, power up and Secured Boot
- Working knowledge of basic IO protocols (SPI/Octal
- High speed I/O protocols such as Ethernet, SDIO, USB2.0, MIPI
- Work closely with DV leads to improve verification flow.
- Strong experience with scripting languages like Perl and
- Should be a great teammate with excellent communication and
problem-solving skills and the desire to seek diverse
- BSEE or MSEE with 15+ years of dedicated/hands-on DV experience
in using System Verilog.Alif Semiconductor provides equal
employment opportunities to all employees and applicants for
employment and prohibits discrimination and harassment of any type
without regard to race, color, religion, age, sex, national origin,
disability status, genetics, protected veteran status, sexual
orientation, gender identity or expression, or any other
characteristic protected by federal, state, or local laws.This
policy applies to all terms and conditions of employment, including
recruiting, hiring, placement, promotion, termination, layoff,
recall, transfer, leaves of absence, compensation, and
Keywords: Celesta, Pleasanton , Senior Design Verification Manager/DV Lead, Executive , Pleasanton, California
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